Fujitsu K Computer Tops the Latest Top 500
Posted on 20-6-2011 by Zhenyu Ye
The latest Top 500 supercomputer list was released during the International Supercomputing Conference (ISC) 2011. The Fujitsu K computer, with 8.162 Petaflops LINPACK performance, officially tops the list. A video of interview with Hans Meuer and Jack Dongarra on the latest Top500 list is available at insidehpc.
Emerging Applications from the UC Berkeley Par Lab
Posted on 6-6-2011 by Zhenyu Ye
Tags: application, architecture
This is the keynote given by David Patterson in the Workshop on Emerging Applications and Many-Core Architecture (EAMA) 2011, co-located with ISCA 2011. The slides are available here.
An Interview with Leslie Valiant, Laureate of Turing Award 2010
Posted on 1-6-2011 by Zhenyu Ye
Tags: architecture, algorithms, neural network
Beauty and elegance, an interview with Leslie Valiant, in Communications of ACM June 2010. He is awarded due to his contributions in multiple areas, including parallel computing and artificial intelligence.
Embedded Vision Alliance (EVA)
Posted on 1-6-2011 by Zhenyu Ye
Tags: GPU, FPGA, architecture, vision
Embedded Vision Alliance (EVA) is recently introducing its web portal at http://www.embedded-vision.com/.
Saliency and Visual Attention Algorithms and Implementations
Posted on 31-5-2011 by Zhenyu Ye
Tags: vision, neural network
A few major approaches for saliency and visual attention. Feel free to add more.
Recent hardware implementations:
Recent Vision and Graphics Processors From KAIST
Posted on 31-5-2011 by Gert-Jan van den Braak
Tags: architecture, vision, neural network
Here is a growing list of papers on vision and graphics processors from KAIST in recent years. Feel free to add more to this list!
Visual attention and object recognition processor (first author Kwanho Kim):
Visual attention and object recognition processor (first author Joo-Young Kim):
Processor for unified visual attention model (UVAM):
Memory system design:
Unified vision and graphics architecture for augmented reality:
Posted on 26-5-2011 by Zhenyu Ye
Below is a list of papers (feel free to add more) that might be interesting to the members of the group. All of them are of high quality.
- Exploring the Tradeoffs between Programmability and Efficiency in Data-Parallel Accelerators, from ParLab and Cornell. It has a thorough comparison between several parallel architecture templates.
- Energy-efficient Mechanisms for Managing Thread Context in Throughput Processors, from U Texas, Illinois, NVIDIA (Erik Lindholm and William J. Dally), and U Virginia(Kevin Skadron).
- Dark Silicon and the End of Multicore Scaling, from U Washington, Wisc, U Texas, and Microsoft.
- OUTRIDER: Efficient Memory Latency Tolerance with Decoupled Strands, from the Rigel group in Illinois.
- Moguls: a Model to Explore Memory Hierarchy for Throughput Computing, from Penn State U and Intel.
- Kilo-NOC: A Heterogeneous Network-on-Chip Architecture for Scalability and Service Guarantees, from U Texas, NVIDIA, and Carnegie Mellon(Onur Mutlu).
Slides exascale symposium online
Posted on 18-5-2011 by Cedric Nugteren
Tags: GPU, symposium
The slides for the “Challenges Towards Exascale Computing”, held on the 16th of May in Ghent, are now available through their website.
Although quite general, the slides do feature some nice graphs/diagrams, especially those of NVIDIA, Intel, ARM and Berkeley.