Internal Vacancies

PhD / Post-Doc Position in Ultra-Low-Power Wearable Brainwave Processor

Job Description

Eindhoven University of Technology

Eindhoven University of Technology (TU/e,, founded in 1956, is a world-leading
research university specializing in engineering science & technology. The Department of Electrical Engineering is responsible for research and education in Electrical Engineering. The TU/e is the world’s best-performing research university in terms of research cooperation with industry (#1 since 2009). Eindhoven is also the world’s most innovative city with the highest number of patents per resident.

Electronic Systems group at the TU/e
The Electronic Systems (ES) group ( comprises three full professors, two part-time full professors, two associate professors, six assistant professors, about 40 PhD candidates and postdocs, and several technical and support staff. The group has excellent infrastructure that includes individual computers, servers, state-of-the-art FPGA and GPU farms, sensor- and ad-hoc networking equipment, and a comprehensive range of electronic-design software. The group is member of Europractice and CMP, having access to advanced CMOS technologies down to 28nm. The group is authorized user of ARM DesignStart design suite, and has acquired the ARM Cortex M0 and M4 processor IP from ARM.
The ES group is world-renowned for its design automation and embedded systems research. It is our ambition to provide a scientific basis for design trajectories of digital electronic circuits, embedded and cyber-physical systems. The ES group excels in the area of digital VLSI circuit and system design. A variety of state-of-the-art chips have been developed by our ES group together with our industrial partners, such as NXP Semiconductors and imec – Holst Centre.

PhD /Post-Doc position in the BrainWave project (
Brain-related diseases, such as epilepsy and Parkinson’s Disease (PD), are severely degrading
people’s quality of life. Few of the disease cases can be cured by medication alone. Many patients have to go to specialized hospitals to receive continuous monitoring of their electroencephalogram (EEG) signals, which is costly and impacts patient’s well-being. Current EEG sensing and processing platforms used in advanced hospitals are bulky and wired to the patient’s head. The used equipment is also power hungry and not self-sustainable, thereby far from being wearable, prohibiting continuous (24/7) monitoring. A solution is urgently needed to help these patients and raise their quality of life.

In this BrainWave project, we research and develop a wearable brainwave processing platform enabling 24/7 healthcare of epilepsy and Parkinson’s disease patients in non-hospital environments. Its key contribution is a novel brainwave processor which will analyze and interpret the EEG signals that are collected non-invasively by a multi-channel sensor interface. Ultra-lowpower, on-chip context-aware and patient-specific signal processing together with features such as data logging and cloud connection will make this brainwave processing platform really wearable and suitable for non-hospital environments.
In this project, the Electronic Systems (ES) group at TU/e collaborates with the Signal Processing System (SPS) group at TU/e, Kempenhaeghe, and the Donders Institute at the Radboud University Nijmegen. Two of our industrial partners NXP and TMSi will be heavily involved in the chip and system development as well.

Three PhD students are involved in this project. The first PhD student is in charge of signal processing algorithm development, and is supervised by professors from the TU/e SPS group, Kempenhaeghe, and Donders Institute. A second PhD student is concerned with new ultra-low-power circuit-level implementation methods and the process technology interface, supervised by professors from the TU/e ES group.
In this third position the focus will be on ultra-low-power architectural innovations for mapping the new brainwave processing algorithms. The selection and modification of algorithms, and their ultra low-energy (combined HW-SW) implementation, without compromising functional performance, is a key challenge in this assignment.

Since two other PhD positions are already active for some time, we are looking either for a PhD candidate with already substantial experience in architecture creation for signal processing algorithms to have a flying start. Another option is to apply as Post-doc.

The PhD involved with signal processing is being supervised by Prof. Dr. Richard van Wezel, Prof. dr. Johan Arends, and Dr. Mike Cohen.
The PhD involved with ultra-low-power circuit design is supervised by Prof. Dr. José Pineda de Gyvez, Prof. dr. Henk Corporaal, and Ir. Jos Huisken. You will be supervised by these people as well.

Required Skills

We are looking for excellent candidates who meet the following requirements:
· A master degree in Electrical Engineering, Computer Engineering, or a similar relevant
program, with excellent grades/CPA.
· In-depth knowledge of computer architecture; knowledge of VLSI circuits and systems; familiarity with state-of-the-art architecture development and evaluation tools; familiarity with HDL coding (e.g. in VHDL or Verilog).
· Familiar with Matlab and scripting languages (such as Perl or Python).
· Very good programming skills, e.g. in C.
· Good communication skills. Excellent proficiency in written and spoken English.
· Highly motivated, team player.

You should be eager to push the state-of-the-art, and to demonstrate your research with working prototypes and publications in top international conferences and journals.

Terms of Employment

We offer a challenging job at a respected university through a fixed-term appointment for 3.5 years. The research during this period is intended to lead to a PhD degree, but due to the limit of a 3.5 year contract we allow application for a post-doc position as well. We offer a salary starting at Euro 2222 per month (gross) in the first year, increasing up to Euro 2840 per month (gross) in the last year. Moreover, an 8% bonus share (holiday supplement) is provided annually. Assistance for finding accommodation can be given. The university offers an attractive package of fringe benefits such as excellent technical infrastructure, child care, savings schemes, and excellent sports facilities.
TU/e also offers you the opportunity for personal development by developing your social and communication skills. We do this by offering every candidate a series of courses that are part of the Proof program as an excellent addition to your scientific education.

Information and Application

For more information and application, please refer to:

3 ESR (PhD) positions in Horizon 2020 Marie Sklodowska Curie

Job description

3 ESR (PhD) positions in Horizon 2020 Marie Sklodowska Curie European Industrial Doctorate

NeMeCo – Near-Memory Computing Scaling Big-Data Processing into the Next Decade.

The emerging knowledge economy relies increasingly on Big-data applications to extract value out of huge amounts of data by searching for correlations that can be used to predict business trends, find the best medical treatment for diseases, perform financial risk management, determine the best locations to drill for oil and gas, fight crime, and for many other purposes. Big-data applications are very different from traditional workloads and put extremely high demands on the High Performance Computing (HPC) systems that are used to execute them. One of the key challenges in designing new generations of HPC systems that can keep up with the ever-growing data volumes, is that current technological trends prevent large amounts of data to be transferred at acceptable power dissipation costs. Reducing expensive data transfers by ‘bringing computation closer to the data’, also known as near-memory computing, has emerged as a very promising solution to address this scaling issue in HPC systems in order to realize the Exascale computing systems that are required for handling future Big-data workloads. Near-memory computing, however, is still in its infancy, and many challenges have to be addressed before it can be established as an integral component of HPC systems.

NeMeCo is an ambitious Marie Sklodowska-Curie European Industrial Doctorates (EID) Innovative Training Network (ITN) programme, which addresses several of the above challenges. In particular, NeMeCo is an interdisciplinary training and research project aimed at developing power-efficient HPC systems for Big-data processing based on the exploitation of near-memory computing capabilities, and, in this way, making the world a better place by enabling important innovations in, for example, healthcare, energy consumption, traffic congestion and safety.

NeMeCo involves a three-partner network comprising the Eindhoven University of Technology in the Netherlands, IBM Research GmbH in Switzerland, and the Netherlands Institute for Radio Astronomy, ASTRON. These partners provide a unique combination of academic and industrial expertise of Big-data applications, compilers, memory and processor technology, and high-performance computer architecture. NeMeCo offers early stage researchers (ESRs) an excellent multidisciplinary training program at the cross roads of hardware and software design, where complex trade-offs have to be made between performance, programmability and energy efficiency. A board of 8 experienced supervisors will work together across disciplines and sectors to train and mentor the ESRs who will have access to superb research facilities at all locations. A total of three individual PhD projects are available

ESR1: Run-time optimization

ESR2: Compiler technology

ESR3: Near-memory processor design

These three projects complement each other to cover the wide spectrum of aspects related to the following research objectives that build upon each other:

  1. Analysis of Big data workloads, their key algorithms, their complexity in terms of memory, compute and I/O operations, their data locality, their parallelization potential, their mappings to various platforms, possible algorithmic optimizations, etc. The purpose is to obtain a detailed understanding of their characteristics, and their static and dynamic processing requirements (ESR1+2+3).
  2. Modelling of selected Big data workloads, modelling of conventional computer architectures and of potential novel architectures based on near-memory computing, and modelling of the mapping of the workloads on those architectures. Objective is to enable a huge design space exploration, but still with sufficient detail based on accurate predictions of power consumption and performance (ESR1+2+3).
  3. Development of techniques for partitioning, mapping, and compiling Big data workloads on a hybrid HPC system combining conventional processing elements with near-memory computing capabilities (ESR2). Development of techniques for run-time optimization of the performance and power consumption (ESR1). Development of a system-level and accelerator level architecture for a near-memory computing device integrated into a hybrid HPC system (ESR3).
  4. Realization of a near-memory computing tool set and ecosystem including compiler, debugger, performance analysis, and run-time optimization tools (ESR1+2), and a near-memory computing device implementation in a hardware description language (ESR3).
  5. Translation of the expertise, models, tools and architecture, into a small-scale demonstrator of a computing system supporting near-memory computing (ESR1+2+3). This demonstrator will be integrated into an emerging ecosystem for HPC technologies, which increases the commercial relevance of the developed near-memory computing tool set and architecture while, at the same time, allowing evaluation of its application to a wide range of real-world problems. The latter is a key element of the proposed cutting-edge research program and will be instrumental for realizing break-through innovations.

The training is structured individually for each ESR based on a personal career development plan which covers scientific, personal and transferable skills. The ESRs will be employed for an initial period of three years by the Eindhoven University of Technology in the Netherlands, which will also award the PhD degrees. If successful, the employment will be extended by a fourth year. Each ESR will do secondments at IBM Research GmbH in Switzerland (for about 20 months) and at ASTRON in the Netherlands (for about 4 months).

As part of the NeMeCo project, the three ESRs will have access to an exceptionally wide range of state-of-the-art server and supercomputing technologies, including an on-site BlueGene BG/Q system, a collection of OpenPOWER hardware, various commercial GPUs, FPGAs, and DSPs, as well as technologies that are not on the market yet, such as the world’s first hot water cooled 64-bit microserver 1 and an accelerator platform that is based on the direct attachment of FPGAs to the memory interconnect of a commercial server processor 2.

In addition, the DOME project 3 , in which ASTRON and IBM jointly perform fundamental research on large-scale green Exascale computing for the Square Kilometre Array (SKA) radio telescope, offers the ESRs a unique opportunity to get experience with an ‘extremely Big’-data application, involving the processing of Exabytes of astronomical data collected by hundreds of thousands of antennas and dishes for exploring the universe. The SKA will become the biggest radio telescope on earth requiring enormous compute power when it becomes operational in the next decade.



We are looking for highly motivated candidates having a master’s degree with excellent grades in a relevant field (e.g. Computer Science, Electrical Engineering). Also required are solid programming skills (e.g., in C or C++) and good English proficiency. According to the Marie-Curie regulations, candidates shall, at the time of recruitment, be in the first four years of their research careers, and have not been awarded a doctoral degree. They also must not have resided or carried out their main activity (work, studies, etc.) in the Netherlands for more than 12 months in the 3 years immediately preceding the time of recruitment.

Conditions of employment

  • a challenging job in a dynamic and ambitious university and a stimulating internationally renowned research environment;
  • full-time temporary appointment for 3 years, which will be extended with one year if it is successful;
  • gross salary between € 2.174,00 and € 2.779,00;
  • an extensive package of fringe benefits (e.g. excellent technical infrastructure, the possibility of child care and excellent sports facilities);
  • On top of the normal conditions you will receive the Marie Curie benefits.


If interested, please follow any one of these links:

You should upload the following:

  • a detailed curriculum vitae, a letter of motivation and portfolio with relevant work;
  • a cover letter explaining your motivation and suitability for the position;
  • a detailed Curriculum Vitae (including a list of publications and key achievements in research project(s));
  • contact information of two references;
  • copies of diplomas with course grades;

Candidates will be selected based on graduation mark and proficiency at university including consideration of the reputation of the university, relevant experience and skills, writing skills and publications, work experience as well as performance in relevant modelling exercises and interviews.

Applications from women, who are currently under-represented in this area, will be particularly welcome. If male and female candidates have the same qualifications, preference will be given to female candidates.

Please note that applications for all three projects are allowed. Please list the projects in order of interest in your application.

Please keep in mind; you can upload only 5 documents up to 2 MB each!

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External Vacancies

Electronic Design Engineer - TechnoCentrum Nijmegen

A job opening for master-level engineers at he TechnoCentrum from the Radboud University in Nijmegen as Electronic Design Engineer. Please refer to the attached document for further details.

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2 Embedded Software Developer positions at Accerion

Accerion is a fast growing robotic startup, developing a new technology to determine the position of mobile robots and AGV without the need of external infrastructures.

The sensor developed by Accerion results from the combination of advanced computer vision algorithms, modern heterogeneous processing platforms and advanced hardware components.

Accerion is looking for software developers who want to be part of a young and enthusiastic team building a great product with unique value for the industry.

Ideal team members are excited about:

  • Working in a high-tech robotics startup, as part of a young and enthusiastic team
  • Technical (hardware and software) challenges, creative solutions and cutting-edge technology
  • Taking on different roles in the projects, learning new skills and continuous development

The skills you will be using are:

  • Embedded C++, multi-core and GPU programming
  • Writing high-performance code and modern algorithms
  • State-of-the-art computing platforms
  • Experience and love for hardware (robotics, sensors, tinkering)
  • Understand and connect the dots of the whole system

For more information and contact details please follow the attached link:

2 PhD positions at the University of Córdoba

There are 2 PhD positions available in GPU and heterogeneous computing at the University of Córdoba for an European H2020 Marie Curie ITN project called HiPerNav (High Performance soft-tissue Navigation, project duration 01.11.2016-31.10.2020).

The PhD students will work on GPU and heterogeneous computing for image registration, and for enhancement and denoising of pre-operative and intra-operative images.

The scientific and clinical goal of HiPerNav is to develop a navigation platform for management of liver cancer and metastases treatment to improve the eligibility and prognosis for liver surgical procedures and ablation treatment, enabling an integral management of surgical workflow:

  1. pre-operative surgical planning
  2. intra-operative resection navigation and ablation monitoring
  3. post-operative quality control

Requirements for the applicants are strong background in Computer Architecture, parallel programming, and GPU programming. In addition, good English proficiency is necessary. More details can be found here:

Two postdoc opportunities at Imperial College London

Two postdoc opportunities working at the interface between heterogeneous parallel compilers and architectures, and 3D scene understanding.

Further details of the posts can be found here:

The application deadline is December 14th 2016.

2 PhD Positions in Amsterdam

The iDAPT project will focus on run-time monitoring, analyzing, simulating and steering the extra- functional behavior (EFB) of complex, networked real-time computer systems. EFB is a general term that encompasses all the behavior of a computer system not primarily encoded in the source code of its software, like performance, throughput, fault rates, total memory usage, disk I/O, etc. The proposed approach in this project is to model and simulate the system at a high level of abstraction, and perform run-time monitoring and analysis of EFB while the system is operating. These abstract simulation system models will need to be made ‘auto-calibrating’ (i.e., they are calibrated at run time) and should allow for predicting – using e.g. machine-learning techniques – how the EFB will evolve over time and, if needed, to propose operating-system based countermeasures to control the EFB according to requirements of the system (components). The proposed methodology will provide a breakthrough in EFB management of complex, networked computer systems.

For more information and contact details please see the attached pdf document.

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