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Section: Journal

A Low Energy Wide SIMD Architecture with Explicit Datapath
Luc Waeijen, Dongrui She, Henk Corporaal and Yifan He, Journal of Signal Processing Systems (JSPS), 2014
Link to DOI
Tags: low energy, wide SIMD, explicit datapath



Construction and Exploitation of VLIW ASIPs with Heterogeneous Vector-Widths
Diken, E.; Jordans, R.; Corvino, R.; Jóźwiak, L.; Corporaal, H. and Chies, F. A., Microprocessors and Microsystems, 2014
Link to DOI
Tags: VLIW, heterogeneous vectorization, DLP


Section: Conference

A Study of the Potential of Locality-Aware Thread Scheduling for GPUs
Cedric Nugteren, Gert-Jan van den Braak, Henk Corporaal, 7th International Workshop on Multi-/Many-Core Computing Systems (MuCoCoS), 2014
Link to publication
Tags: GPU, thread scheduling



A Data-Reuse Aware Accelerator for Large-Scale Convolutional Networks
Maurice Peemen, Bart Mesman, and Henk Corporaal, NeuroArch Workshop at ISCA, 2014
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Tags: Convolutional Networks, Data Reuse, Fusion, Recomputation



Reduction Operator for Wide-SIMDs Reconsidered
Luc Waeijen, Dongrui She, Henk Corporaal and Yifan He, 51st Design Automation Conference (DAC'51), 2014

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Construction and Exploitation of VLIW ASIPs with Multiple Vector-Widths
Diken, E.; Jordans, R.; Jóźwiak, L. and Corporaal, H., MECO 2014 - 3rd Mediterranean Conference on Embedded Computing, 2014

Tags: VLIW, ASIP, DLP, vectorization



Instruction-set Architecture Exploration of VLIW ASIPs Using a Genetic Algorithm
Jordans, R.; Jóźwiak, L. and Corporaal, H., MECO 2014 - 3rd Mediterranean Conference on Embedded Computing, 2014

Tags: DSE, VLIW, ASIP, genetic algorithm



BuildMaster: Efficient ASIP Architecture Exploration Through Compilation and Simulation Result Caching
Jordans, R.; Diken, E.; Jóźwiak, L. and Corporaal, H., DDECS 2014 - 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2014

Tags: DSE, VLIW, ASIP



A Detailed GPU Cache Model Based on Reuse Distance Theory
Cedric Nugteren, Gert-Jan van den Braak, Henk Corporaal, Henri Bal, High Performance Computer Architecture (HPCA), 2014
Link to publication
Tags: GPU, cache model



Roofline-aware DVFS for GPUs
Cedric Nugteren, Gert-Jan van den Braak and Henk Corporaal, ADAPT, 2014
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Tags: GPU, roofline, DVFS


Section: Thesis

Energy efficient code generation for streaming applications
Dongrui She, PhD thesis, 2014
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Tags: compiler, Code Generation



Improving the programmability of GPU architectures
Cedric Nugteren, PhD thesis, 2014
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Tags: GPU, CUDA, compiler, skeletons, Species, Algorithm Classification



Analysis and Modeling of the Timing Behavior of GPU Architectures
Petros Voudouris, Master Thesis, 2014
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Tags: GPU, timing model