Section: Journal
ASAM: Automatic architecture synthesis and application mapping
Jozwiak, L.; Lindwer, M.; Corvino, R.; Meloni, P.; Micconi, L.; Madsen, J.; Diken, E.; Gangadharan, D.; Jordans, R.; Pomata, S.; Pop, P.; Tuveri, G.; Raffo, L. and Notarangelo, G,
Microprocessors and Microsystems,
2013
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Tags: DSE, ASIP, MPSoC
Exploring processor parallelism: Estimation methods and optimization strategies
Roel Jordans, Rosilde Corvino, Lech Jóźwiak, Henk Corporaal,
International Journal of Microelectronics and Computer Science,
2013
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Tags: VLIW, issue-width estimation, DSE
An Energy Efficient Method of Supporting Flexible Special Instructions in an Embedded Processor with Compact ISA
D. She, Y. He, and H. Corporaal,
ACM Transactions on Architecture and Code Optimization (TACO),
2013
Link to DOI
Tags: low-power, SFU, architecture
Efficient Communication Support in Predictable Heterogeneous MPSoC Designs for Streaming Applications
Y. He, D. She, S. Stuijk, and H. Corporaal,
Journal of Systems Architecture (JSA),
2013
Link to DOI
Tags: architecture, Communication Assist, Predictable
Algorithmic Species: An Algorithm Classification of Affine Loop Nests for Parallel Programming
C. Nugteren, P. Custers, H. Corporaal,
ACM TACO: Transactions on Architecture and Code Optimisations 9, 4, Article 40,
2013
Link to DOI
Tags: Algorithm Classification, Polyhedral Model
Section: Conference
Memory-Centric Accelerator Design for Convolutional Neural Networks
Maurice Peemen, Arnaud A. A. Setio, Bart Mesman and Henk Corporaal,
IEEE International Conference on Computer Design (ICCD),
2013
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Tags: FPGA, Memory hierarchy, loop tiling, accelerators, Convolutional Neural Networks
Simulation and Architecture Improvements of Atomic Operations on GPU Scratchpad Memory
Gert-Jan van den Braak, Juan Gómez-Luna, Henk Corporaal, José María González-Linares, Nicolás Guil,
IEEE International Conference on Computer Design (ICCD),
2013
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Tags: GPU, scratchpad memory, atomic operations, hash functions
Automatic Skeleton-Based Compilation through Integration with an Algorithm Classification
C. Nugteren, P.J.J.M. Custers, H. Corporaal,
APPT: Advanced Parallel Processing Technology,
2013
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Tags: GPU, compiler, skeletons, Code Generation
Algorithmic Species Revisited: A Program Code Classification Based on Array References
C. Nugteren, R. Corvino, H. Corporaal,
MuCoCoS '13: International Workshop on Multi-/Many-core Computing Systems,
2013
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Tags: Algorithm Classification, Polyhedral Model, Species
Exploring Processor Parallelism: Estimation Methods and Optimization Strategies
Roel Jordans, Rosilde Corvino, Lech Jóźwiak, and Henk Corporaal,
DDECS - 16th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems,
2013
Link to publication
Tags: DSE, VLIW, issue-width
Instruction-set Architecture Exploration Strategies for Deeply Clustered VLIW ASIPs
Roel Jordans, Rosilde Corvino, Lech Jóźwiak, and Henk Corporaal,
ECyPS - EUROMICRO/IEEE Workshop on Embedded and Cyber-Physical Systems,
2013
Link to publication
Tags: DSE, architecture, VLIW
An Efficient Method for Energy Estimation of Application Specific Instruction-set Processors
Roel Jordans, Rosilde Corvino, Lech Jóźwiak, and Henk Corporaal,
DSD - 16th Euromicro Conference on Digital System Design,
2013
Link to publication
Tags: VLIW, Energy estimation
GPU-CC: a Reconfigurable GPU Architecture with Communicating Cores
Gert-Jan van den Braak, Henk Corporaal,
M-SCOPES,
2013
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Tags: GPU, architecture
OpenCL Code Generation for Low Energy Wide SIMD Architectures with Explicit Datapath
D. She, Y. He, L. Waeijen, and H. Corporaal,
International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS),
2013
Tags: SIMD, Code Generation, low-power
SIMD Made Explicit
L. Waeijen, D. She, H. Corporaal, and Y. He,
International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS),
2013
Tags: architecture, SIMD, low-power
Future of GPGPU Micro-Architectural Parameters
C. Nugteren, G.J.W.v.d. Braak, H. Corporaal,
DATE '13: Design, Automation and Test in Europe,
2013
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Tags: GPU, architecture
Section: Presentation
Visualizing sound and vibrations using a GPU and a 1024-channel microphone array
Wouter Ouwens,
Applied GPGPU-day (Amsterdam),
2013
Tags: GPU
Section: Other
Optimal Iteration Scheduling for Intra- and Inter-Tile Reuse in Nested Loop Accelerators
Maurice Peemen Bart Mesman, and Henk Corporaal,
Technical Report ESR-2013-3,
2013
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Tags: accelerators, Inter-Tile Reuse, Temporal Locality, High-Level Synthesis