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Section: Conference

Algorithm Parallelism Estimation for Constraining Instruction-Set Synthesis for VLIW Processors
Roel Jordans, Rosilde Corvino, and Lech Jóźwiak, DSD - 15th Euromicro Conference on Digital System Design, 2012
Link to DOI
Tags: DSE, VLIW, issue-width



Energy Efficient Special Instruction Support in an Embedded Processor with Compact ISA
Dongrui She, Yifan He and Henk Corporaal, CASES '12: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, 2012
Link to DOI
Tags: low energy, Code Generation, SFU, Reconfigurable Architecture



GPU-Vote: A Framework for Accelerating Voting Algorithms on GPU
Gert-Jan van den Braak, Cedric Nugteren, Bart Mesman and Henk Corporaal, Euro-Par, 2012
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Tags: GPU, Voting Algorithms, hough transform, Histogram



The Boat Hull Model: Enabling Performance Prediction for Parallel Computing Prior to Code Development
C. Nugteren and H. Corporaal, CF '12: International Conference on Computing Frontiers, 2012
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Tags: GPU, model, roofline, CPU, architecture



Scheduling for Register File Energy Minimization in Explicit Datapath Architectures
Dongrui She, Yifan He, Bart Mesman, Henk Corporaal, Design, Automation and Test in Europe (DATE), 2012
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Tags: TTA, Code Generation, Low Power, Register File



Introducing 'Bones': A Parallelizing Source-to-Source Compiler Based on Algorithmic Skeletons
C. Nugteren and H. Corporaal, GPGPU-5: Fifth Workshop on General Purpose Processing on Graphics Processing Units at ASPLOS'12, 2012
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Tags: GPU, skeletons



The Boat Hull Model: Adapting the Roofline Model to Enable Performance Prediction for Parallel Computing
C. Nugteren and H. Corporaal, PPoPP ’12: 17th ACM Symposium on Principles and Practice of Parallel Programming, 2012
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Tags: CPU, GPU, model, architecture, roofline


Section: Presentation

The ‘Bones’ Source-to-Source Compiler: Making Parallel Programming Easy
Cedric Nugteren, GPGPU-day (Amsterdam), 2012
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Tags: compiler



Introduction to GPGPU and GPU-architectures
Gert-Jan van den Braak, GPGPU-day (Amsterdam), 2012
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Tags: GPU, architecture


Section: Thesis

High Level Synthesis: Performance Analysis and Code Optimization
Johan Hendriks, Master Thesis, 2012
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Tags: FPGA, architecture, High Level Synthesis



Algorithmic Species: Classifying Program Code for Parallel Computing
Pieter Custers, Master Thesis, 2012
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Tags: Algorithm Classification



Parallel Training of Large Scale Neural Networks: Performance Analysis & Prediction
Roy van Doormaal, Master Thesis, 2012
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Tags: CPU, GPU, neural networks, training optimization



Saliency Detection on FPGA Using Accelerators and Evaluation of Algorithmic Skeletons
Sheng Hao Wang, Master Thesis, 2012
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Tags: FPGA, vision, skeletons, saliency