Personal page of Maurice Peemen
Alumnus
Curriculum Vitae
Deep Convolutional Neural Networks
Machine Learning
Computer Vision
Loop Transformations for Data Locality
HW Accelerators
GPUs
FPGA
Vector instructions
Guest Lectures:
5SIA0 Embedded Computer Architecture 2015
*Neural Computer Architectures
5KK73 Embedded Computer Architecture 2014
*Neural Computer Architectures
*Tricks of the trade: From loop transformations to automatic optimization
5KK73 Embedded Computer Architecture 2013
*Neural Computer Architectures
*Tricks of the trade: From loop transformations to automatic optimization
Teaching assistant:
5JJ30 High-tech Systems Design 2013
5JJ30 Design of Complex Systems 2012
5JJ55 Computation: ABC for logic synthesis 2012
5JJ30 Design of Complex Systems 2011
Application expert GPU cluster project 2011
Master Project Student Advisor:
Gaurav Raina (2015)
Wisnu Pramadi (2015)
Ward Carmeliet (2014)
Ruizhou Xie (2014)
Peter Broere (2013)
Roy van Doormaal (2012)
The Neuro Vector Engine: Flexibility to Improve Convolutional Net Efficiency for Wearable Vision
Maurice Peemen, Runbin Shi, Sohan Lal, Ben Juurlink, Bart Mesman, and Henk Corporaal, Design, Automation and Test in Europe (DATE), 2016
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Tags: SIMD, VLIW, Convolutional Networks, Accelerator, Locality, ultra-low power
VLIW Code Generation for a Convolutional Network Accelerator
Maurice Peemen, Wisnu Pramadi, Bart Mesman, and Henk Corporaal, 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES), 2015
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Tags: Code Generation, VLIW, Convolutional Networks, Compilation, Software Pipelining
Inter-Tile Reuse Optimization Applied to Bandwidth Constrained Embedded Accelerators
Maurice Peemen, Bart Mesman, Henk Corporaal, DATE '15: Design, Automation and Test in Europe, 2015
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Tags: FPGA, Data Reuse, High-Level Synthesis, Tiling, Interchange
A Data-Reuse Aware Accelerator for Large-Scale Convolutional Networks
Maurice Peemen, Bart Mesman, and Henk Corporaal, NeuroArch Workshop at ISCA, 2014
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Tags: Convolutional Networks, Data Reuse, Fusion, Recomputation
Optimal Iteration Scheduling for Intra- and Inter-Tile Reuse in Nested Loop Accelerators
Maurice Peemen Bart Mesman, and Henk Corporaal, Technical Report ESR-2013-3, 2013
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Tags: accelerators, Inter-Tile Reuse, Temporal Locality, High-Level Synthesis
Memory-Centric Accelerator Design for Convolutional Neural Networks
Maurice Peemen, Arnaud A. A. Setio, Bart Mesman and Henk Corporaal, IEEE International Conference on Computer Design (ICCD), 2013
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Tags: FPGA, Memory hierarchy, loop tiling, accelerators, Convolutional Neural Networks
Efficiency Optimization of Trainable Feature Extractors for a Consumer Platform
Maurice Peemen, Bart Mesman, Henk Corporaal, in Proceedings of the 13th International Conference on Advanced Concepts for Intelligent Vision Systems (ACIVS’11), Ghent, Belgium, 2011
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Tags: GPU, vision, neural networks
Speed Sign Detection and Recognition by Convolutional Neural Networks
M. Peemen, B. Mesman, H. Corporaal, International Automotive Congress, 2011
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Tags: GPU, application, neural networks