Welcome to PARsE

Welcome to the website of the parallel architecture research team. The PARsE team is a subdivision of the Electronic Systems group, part of the Electrical Engineering departement at Eindhoven University of Technology (TU/e) in The Netherlands.

Contents of the website

This website contains information on previous, current and future research, education and events. We update the research log daily with new posts concerning the latest updates in research, discussing articles published at journals and conferences from among others ACM and IEEE. You will find the following sections on the website:

• A daily updated research log.
• An overview of our research, including projects, tools and publications.
• The education page, containing course and student project information.
• Events, such as our GPU symposium.
• More information about us.

NVIDIA GPU Technology Conference and Inpar '12

Next week, May 14-17, the GPU Technology Conference (GTC) 2012 will be held in Silicon Valley. The GTC is hosted by NVIDIA, so expect a lot of interesting CUDA/GPU news coming up (e.g. Kepler, CUDA 5). Apart from news, GPU research will also be presented – either at the main conference or at one of the co-located events.

Inpar is one of these co-located events, presenting research work on a variety of topics, including:

• performance portability,
• architecture impacts,
• auto-tuning,
• persistent threads,
• an active library,
• histogramming.

The full program is available at their website.

Xilinx Introducing the Vivado Design Suite

Xilinx introduces the Vivado design suite in a press release. According to the press release and the product page, the Vivado will support 7-series and Zynq devices but not the old devices, while the ISE will support all the existing devices and the old devices but seems to be phasing out in the future.

Mont-Blanc supercomputer

A recently published article on the web gives some more details on Barcelona’s GPU/ARM-based supercomputer, the Mont-Blanc. According to the article, they’ll start assembling their first prototype soon. It will be based on Tegra 3 SoCs (4 ARM cores), but the main processing will be done by low-power GPUs on a separate chip.

More information is also available on their website.